The U.K. Science and Technology Facilities Council's (STFC) Rutherford Appleton Laboratory (RAL) has developed a wafer-scale complementary metal-oxide-semiconductor (CMOS) imaging sensor that's targeted at digital mammography and digital tomosynthesis applications.
With sensing pixels right up to the edges on three sides of the imager, this allows multiple sensors, manufactured on 200-mm silicon wafers, to be "butted" or "tiled" together in a 2 x 2 arrangement to form a larger imaging area and meet requirements for mammography applications, the STFC said. In addition, any 2 x N sensor arrangements are possible to allow for even larger-area coverage such as chest imaging, according to the council.
Measuring 120 x 145 mm and effectively using an entire 200-mm silicon wafer in its production, the sensor offers a focal plane of 139.2 x 120 mm and has 6.7 million (2,800 x 2,400) pixels on a 50-micron pitch, according to the STFC. It also includes 32 analog outputs and features low noise, a high dynamic range, and a programmable, region-of-interest readout, according to STFC.
Each pixel is constructed from a basic three-transistor base with a low-noise, partially pinned photodiode that offers "charge-binning" capability to deliver high signal-to-noise characteristics, according to the council. The sensor can support a frame rate of 40 frames per second at full resolution and "binned" images can be read at an increasingly faster rate; the high frame rate makes the sensor suitable for applications such as digital tomosynthesis the STFC said.
